Monday, 2013-03-04

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* mranostay trolls in06:21
mranostaydm8tbr: intel all things?!? :)06:26
dm8tbrgood moaning06:31
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prpplaguemranostay: j19 has a pci, usb, lvds and sata signals onboard. all high speed differentials that need proper impedance and connectors rated for that clock frequency13:16
prpplaguemranostay: we'll have a lure board with the low speed broken out for breadboard13:17
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prpplaguemranostay: welcome to the x86 zone15:38
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prpplaguedavest: morning15:49
davestprpplague Howdy!15:50
mranostayanother monday grrr15:59
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av500prpplague: can we rant here how x86 is so much worse than ARM?16:01
prpplagueav500: not unless you like to get a k/b16:01
prpplagueav500: but you can whine and complain about RPi16:01
mranostayav500: don't make davest cry :P16:08
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davestmranostay too late16:15
av500I mean, facebook and baidu are going ARM16:18
prpplagueav500: hehe16:19
prpplagueav500: maybe intel is behind the VC firms buying up all the TI stock16:19
prpplagueav500: Atom + OMAP = ATAP16:20
prpplaguekoen: greetings16:22
koenhey prpplague16:24
zenlinux_morning all16:46
prpplaguezenlinux_: greetings17:02
zenlinux_what's on the hardware agenda for today?17:03
av500a case, we need a case!17:04
prpplagueav500: hehe17:05
prpplagueav500: plexi glass with blue leds17:05
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zenlinux_I think koen made some rumblings of designing a case that could go up on thingverse17:10
prpplaguezenlinux_: av500 was trolling, as that usually is one of the first items that new users as for when they really have no clue what the board is for...17:12
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prpplaguerussell--: greetings17:16
zenlinux_hey there russell-- - how was your hardware fest last weekend?17:19
prpplaguehardware fest?17:25
zenlinux_russell-- runs a community wifi org in Portland. They had an event last weekend (IIRC) where people could show up and set up routers with the firmware images personaltelco uses, and learn how they are built17:25
prpplagueahhh right17:26
* prpplague recalls meeting russell-- somewhere in the past17:26
russell--hi zenlinux_ :-)17:30
russell--ted brunner was there, was at elc, told me a little about it17:32
russell--our event was basically a "demystifying openwrt build process" thing17:35
russell-- /them: "oh shit, the build stopped, wtf?"; /me: "oh, yeah, just do this, see? easy!" (or words to that effect)17:39
koenand then17:39
koen"yocto is sooo much better, dump openwrt"17:39
* koen purposely misused the jargon17:40
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mranostayav500: we could mock it in #minnowborad17:58
mranostaydavest: btw you may want to get that domain before one of us does :P17:59
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prpplaguegreetings mdp  and lepramannen18:15
mranostaywelcome to the wonderful world of x8618:15
lepramannenthank you :)18:15
mranostayarm is dead long live x8618:16
mdpprpplague: greetings and saltytations18:16
* mdp is preparing for the future18:17
mranostayprpplague: will there be a r-pi lure?18:17
prpplaguemranostay: no, but there will a minnow adapter so you can add it to the RPi18:18
mranostayprpplague: too lazy to look but what voltage is the logic for i2c, gpio and etc?18:20
prpplaguemranostay: everything is suppose to be 3.3V for low speed i/o18:21
prpplaguedavest: do we need to be a privileged user to get the answers on the lvds answered or will the basic account get us enough support?18:26
mranostayprpplague: on board ethernet pci-e?18:28
prpplaguemranostay: gige via intel equive of gpmc18:29
mranostayah so you can true off the pci-e bus if want to save power?18:29
prpplaguemranostay: yea that is my understanding18:30
* prpplague is still coming up to speed on x86isms18:30
mranostayprpplague: once you understand you have job security :P18:33
mranostaylike all those grey beard BIOS guys :P18:33
davestprpplague: you have exceeded my limited knowledge of premier18:35
prpplaguedavest: hehe no worries18:35
* prpplague is known for "going boldly where no one has gone before"18:35
mranostayprpplague: thin line between bravery and insanity :)18:39
prpplaguedavest: i've ordered all the connectors and parts to do some Lure board mockups. i'll have them build and pictures made for wednesday18:39
davestprpplague: beauty18:40
prpplaguemranostay: i am usually on the insanity side18:40
mranostayso who is getting free samples? :)18:40
prpplaguemranostay: sure as hell not you18:40
* mranostay cries :P18:40
prpplaguemranostay: we don't need no stinking geiger cape err i mean lure18:40
* davest now understand why I don't pay attention to #beagle18:41
mranostaydavest: which is? :)18:42
prpplagueprobably too many distractions, hehe18:42
prpplaguedavest: if you get time, feedback on the email about lure types would be appreciated18:44
mranostayprpplague: space heater lure? :)18:45
prpplaguemranostay: sorry not making a Lure with an OMAP5 onboard....18:45
mranostayFPGA lure?18:46
prpplaguethat one is on the list18:46
prpplaguebut i have to research it18:46
prpplaguemaybe get a variation of emeb18:46
prpplague's board18:46
davestprpplague: OK18:47
mdpmranostay, I already designed the FPGA Lure on G+ ;)18:48
mdpmranostay, just remembering a couple plx pci->LB fpga designs Iworked on in the past18:49
mranostaymdp: is there a lure eagle part? :)18:50
mdpprpplague: is there an external bus controller brought out? I didn't think there was some thing like that or maybe I misread18:50
mdpon the expansion pins, I mean18:50
prpplaguemdp: not sure i understand what you mean by external bus controller18:51
mdpa generically programmable local bus controller18:52
mdpI think you just mentioned that there is such a thing on the part above..but not brought out to expansion pins?18:52
prpplaguemdp: you mean something akin to GPMC in OMAP terms?18:53
mdpeverybody has their own name for this entity18:53
prpplaguemdp: right, just wanted to make sure we were talking apples to apples18:54
prpplaguemdp: nothing of that nature out on the expansion header18:54
prpplaguemdp: intentionis to use the pcie bus18:54
mdpok, yeah, that's why I suggested a plx bridge18:54
mdpsame issue we had with "classic" PPCs and FPGAs18:55
prpplaguemdp: ahh dandy18:55
mranostayprpplague: dmx lure? :)18:55
mdpthose parts work great, btw18:55
prpplaguemdp: if you have some reference schematics and/or part numbers send them to me18:55
prpplagueugh pbga18:56
mdpI've never used the pci-e version..but on my brief look, it looks unsurprisingly similar to their plx903018:56
mdpwhich is the analogous one I worked with on a couple end-customer boards18:57
mdpthis is a long time ago, mind you18:57
prpplagueok, i'll research this18:57
mdpI'm just getting back in to pcie stuff, I'm sure somebody has a similar type part18:57
prpplaguewe only have two lanes available but it looks configurable18:59
mdpand the funny part is that it is specifically designed for this use case..such a common one on pci(-e) systems19:00
prpplaguethanks for the tip19:03
prpplagueit looks like too much work to have ready for design west, but it is something that will be of interest19:03
mdpprpplague: ugh, you know what..if you go virtex-5, it's got a pcie EP block built-in19:05
mdpI do wonder if you need paid ISE to work with that part and such...considering the end user target19:06
prpplaguemdp: yea that was my first thought19:06
mdpanyway, have fun19:06
prpplaguemdp: hehe19:08
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calculusprpplague: hello22:46
prpplaguecalculus: hey bud22:46
prpplaguecalculus: thanks for the feedback info22:46
prpplaguecalculus: i'll send a response back with some answers22:46
calculusprpplague: no problem thanks for the invite :)22:47
mranostayprpplague: is there a SATA controller on this board?23:12
prpplaguemranostay: two23:12
mranostaywell that is a win23:12
prpplaguemranostay: one standard sata connector, the other is on the expansion header23:13
prpplaguemranostay: i have a mSATA lure in the works23:13
mranostaylow end webserver + jenkins master node usage for me23:14
prpplaguemranostay: yea i am looking for doing some tests for that23:14
* prpplague goes to get coffee, bbiaf23:15
mranostaywasn't OMAP5 suppose to have SATA?23:15
* mranostay ducks 23:15
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dvhartkoen, I believe this is what you were looking for earlier:23:21
dvhartGPIOs 5-13, platform/sch_gpio.33158, sch_gpio_resume:23:21
dvhart gpio-6   (minnow_led_0        ) out hi23:21
dvhart gpio-7   (minnow_led_1        ) out hi23:22
dvhart gpio-8   (minnow_led_2        ) out hi23:22
dvhart gpio-9   (minnow_led_3        ) out hi23:22
dvhart gpio-10  (minnow_btn_0        ) in  hi23:22
dvhart gpio-11  (minnow_btn_1        ) in  hi23:22
dvhart gpio-12  (minnow_btn_2        ) in  hi23:22
dvhart gpio-13  (minnow_btn_3        ) in  lo23:22
* dvhart has basic leds-gpio and keys-gpio-polled working in the minnowboard platform driver23:22
dvhartevdebug shows the keys coming in as well23:22
dvhartprpplague, the gpio lines of course will change, but that's just a matter of changing the defines23:23
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mranostaygpio keyboard?23:31
mranostay*keypad rather?23:31
prpplaguedvhart: understood23:36
prpplaguemranostay: yea omap5 does have sata23:36
dvhartmranostay, just playing with the platform driver23:36
dvhartthe current rev of the board has 4 buttons tied into gpio23:37
dvharttrying to decide how to best represent them from the kernel23:37
dvhartI can do a sysfs export23:37
dvhartfor a generic interface23:37
prpplaguedvhart: i'll have the mockup lures ready for the thursday call23:37
dvhartor I can do something like this where they basically emit keycodes23:37
dvhartI wonder if anyone has a preference for what would be more generally useful?23:37
dvhartI could write multiple drivers, they're simple enough...23:38
dvhartprpplague, great... this GPIO/LVDS thing is really holding us up23:38
dvhartwondering if we should move forward assuming we have to reserve SUS[0:4]23:38
prpplaguedvhart: indeed it is blocking23:39
dvhartprpplague, yeah, I know it's on us ;-)23:39
prpplaguedvhart: yea from what i gather we may want to go ahead and just reserve their usage23:39
prpplaguedvhart: my main concern currently is with SUS023:39
dvhartshall I look it up, or do you want to remind me why it's special?23:40
prpplaguedvhart: if we use SUS0 unbuffered the pin is pulled high which means it will have the lvds enabled on boot which will cause some issues and possible artifacts on the screen23:40
prpplaguedvhart: if we do it buffered, we'll need to have pulldowns to make sure it is disabled on boot23:40
prpplaguedvhart: which means we have to tweak the values on each side of the buffer so that the pulldown does not negate the pullup23:41
prpplaguedvhart: the other sus pins are not as important for powerup state23:42
dvhartso strapping23:42
prpplaguedvhart: the adlink board didn't come with a full schematic, so i have had to reverse engineer a few items23:44
dvhartprpplague, bleh23:44
prpplaguedvhart: they have on of the pins on the connector that when the lvds panel is connected is grounded, they are using this as a hot-plug detect for the lvds23:45
prpplaguedvhart: this is how they are deciding which display to boot to23:45
dvhartseems reasonable (something lee and I had discussed as well)23:45
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