Thursday, 2015-01-29

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warthog9rZr: I should be on that list01:03
warthog9if I'm not I have things to fix01:03
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gahseyfananyone know what messages like this on MBM mean: 1.091744] pci 0000:00:11.0: can't claim BAR 0 [mem 0x90900000-0x90900fff]: no compatible bridge window06:03
gahseyfani see them when I put "LPSS & SCC Devices Mode" as PCI06:11
warthog9gabrbedd: in the kernel log?06:17
warthog9(I.E. dmesg)06:17
warthog9gahseyfan: --^06:17
warthog9gabrbedd: sorry06:17
gahseyfanwarthog9: yes, from dmesg06:20
warthog9gahseyfan: likely an issue in what the firmware is passing into the kernel06:23
warthog9it shouldn't be an issue06:23
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gahseyfanwarthog9: hrm, thought it might be related to my CS active-high troubles.  my module loads (but with a null chip_info) in ACPI mode, and explodes when in PCI mode.07:08
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gahseyfanwarthog9: was trying pci mode because spi-pxa2xx.c has a comment that notes: "Slave devices enumerated from ACPI namespace don't usually have chip_info"07:11
gahseyfanupdating thread "SPI Questions" with more details07:23
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gahseyfanwarthog9: methinks i need a call to pxa2xx_set_spi_info somewhere07:51
gahseyfanwarthog9: ah, I think actually I need to populate controller_data in my spi_board_info struct with a pxa2xx_spi_chip struct08:01
warthog9gahseyfan: just checking, you saw the spidev example file?08:02
gahseyfanwarthog9: yeah, started from that.  in my stack trace you can see my module is still named low-speed-spidev.  will eventually rename.  IIUC I should eventually have a board file and a protocol driver (right now in my board file i have some functions to make the spi device actually do things)08:04
* warthog9 nods08:05
warthog9double checking, I thought we had something where we did things with the pxa2xx_spi_chip struct in there, but checking now I'm not seeing that08:05
warthog9ok I've got to crash, 8am phone call and a noon flight to Brussels tomorrow08:06
gahseyfansafe travels, i will keep plodding along 8)08:06
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aholler_time for snow.sh: http://dpaste.com/0KKP9VX ;)11:56
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aholleror now available to download: http://ahsoftware.de/snow.sh ;)12:13
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_daniel_aholler: nice :)12:22
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ahollerand now on github too: https://github.com/aholler/snow ;)12:28
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rZrwarthog9, gone ?19:25
rZrplease can you confirm minnowmax firmware is free of binaryblobs ?19:25
rZrprpplague, ?19:25
prpplaguerZr: warthog9 is traveling to FOSDEM19:26
rZryea I'll met him f2f19:26
prpplaguerZr: both UEFI and Coreboot are not free of binary blobs19:26
rZrhow comes ?19:26
prpplaguerZr: a single blob is used for the memory init and few minor items19:26
rZrshould I mention about that ?19:27
rZris it planned to be floss ?19:27
prpplaguerZr: that section of code is similar to the same binary rom you see in most ARM processors19:27
prpplaguerZr: i don't have info on the future plans of that section19:27
prpplaguerZr: i can link you to some info19:27
rZrthx19:27
rZrthis will be welcome since I will talk about tizen on oshw19:27
prpplaguehttp://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html19:28
prpplaguerZr: basically most ARM (and other architectures) have a ROM code that is started on powerup19:28
prpplaguerZr: in most ARM SoC's it is in ROM formate internal to the SoC19:29
rZrthey dont say there is evil closed code in the 1st chapter ;)19:29
prpplaguehehe19:29
rZr;)19:29
rZrbtw do you care about iotivity19:29
rZr?19:30
prpplaguein this case for UEFI and Coreboot, both use the same type of ROM code, it just so happens it is compiled into the firmware19:30
rZri am telling you because we will use max for iot demos19:30
prpplaguewe care about it all19:30
rZrso we do as you already know19:30
* prpplague fixes an after lunch cup of tea and prepares for conference calls19:31
prpplaguebbiab19:31
rZrsee you thanks for the info I will keep you up to date19:32
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aholleragain, it's a difference as the rom code on ARM devices is dead when the OS starts working. A BIOS or UEFI is still alive afterwards.19:57
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ahollerAt least I've never seen any code in the kernel on ARMs which calls some ROM code.19:59
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ahollerwhat does that binary blob do that it has to be a secret which can't be replaced by free code?20:04
rZrhttp://en.wikipedia.org/wiki/Nothing_to_hide_argument20:05
ahollercan't be just some microcode as the kernel already has a mechanism to feed that to the hw.20:05
ahollerit's a bit different than that nothing to hide. Everyone has something to hide, even if that are only passwords.20:09
ahollerAt least I don't have a big problem with binary drivers or similiar, as long as there is a clear description what it does and what it might be able to do and what it never will do.20:11
ahollerUnfortunately almost any trust in IT is totally gone for a good reason20:13
rZryea I was return the argument20:14
rZrbecause I do believe mr Eric Schmidt20:15
rZris the first one that have something to hide20:15
rZrie: google is not opensource as far as I know20:15
ahollerThey hide a lot of things20:15
rZrso maybe they are doing things they should not do in the first place ?20:15
rZrwouldnt it be suprising ?20:16
ahollerall companies have a lot to hide20:28
rZreven wikileaks have :)20:38
bcranrZr, aholler: modern Intel CPUs can't get past DRAM initialization without loading new microcode, and that's a binary blob. At the moment the FSP is binary only, but there's work going on (people talking to Intel) apparently to try and open source more of it20:40
bcran"In addition to enabling as above the development of free BIOS firmware, we are also working with Intel to allow us to scrub, release, and maintain the source for the FSP, but haven’t finalized that yet. We are devoted to freeing this binary."20:41
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bcranhttps://www.crowdsupply.com/purism/librem-laptop20:41
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interrobangd_hello21:58
interrobangd_where can I buy the minnowboard? its not in stock21:59
ranixdid you check all of digikey, newark, etc22:01
interrobangd_digikey has no minnowboard max22:02
ranixthey just came out so still tough to get ahold of22:02
interrobangd_have found ONE shop in US22:04
interrobangd_but i am in germany :s22:04
interrobangd_~216€ :O22:04
warthog9interrobangd_: did you check the website's where to buy link?22:05
interrobangd_of course22:06
interrobangd_tital etc22:06
warthog9could check with the various distributors see what their actual lead times are looking like, as the numbers I've seen aren't accurate to what I know is getting shipped out22:07
interrobangd_i dont understand22:08
interrobangd_no shop has that board in stock, have to wait ~4-6 month22:09
warthog9interrobangd_: what I'm saying is the claimed lead times, your ~4-6months, is likely inaccurate22:15
interrobangd_but ture22:15
interrobangd_*true22:15
warthog9interrobangd_: case in point, people have generally reporting mouser getting them product in ~2wks22:15
warthog9their website claims something like 28wk leads22:15
interrobangd_yes22:15
* warthog9 hasn't looked recently22:15
ranixyou could also email circuitco and ask22:16
ranixthey are pretty cool22:16
ranixbe like hey when are you making more22:16
ranixthey might blow you off but they might answer22:16
warthog9CCo also runs / owns technodisti so there is a way to order directly from them22:16
interrobangd_but yesterday talked to a boy that bought a minnobard on juno 2014 and canceld the order 5 or 6 month later22:18
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interrobangd_if i order in US, i have to pay also the tax of US?22:21
ranixdunno22:24
interrobangd_ok 225€ - NO!22:24
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gahseyfan@warthog9 so if I switch LPSS SPI support to disabled my board file will be hosed, right?  I emailed linux-spi@vger.kernel.org when I started looking into this and didn't get any response (but now have a clearer understanding of the issues)22:45
warthog9gahseyfan: if you want to use pin 220 as GPIO you would have to turn off SPI22:45
warthog9(linux pin)22:46
warthog9(too many bloody ways to refer to those pins)22:46
gahseyfan@warthog9 but won't that turn of 7 9 and 11 too? (physical pins)22:46
warthog9yes22:46
gahseyfanso board file hosed22:46
warthog9you could try using physical pin 21 (linux 82/338) instead?22:47
warthog9that's GPIO all the time22:47
warthog921, 23, 25 all are GPIO all the time22:47
warthog9(I.E. no pin-muxing)22:48
gahseyfancool, yeah it would mean reworking the board.  will test it out to make sure it works.  I think my SPI device expects 5V on the CS line, so will probably be in undefined territory with 3.3V22:48
ranixwhy is it that the max won't invert the chip select signal when it's specified in the spi_board_info struct anyway22:48
ranixis that an efi firmware thing or a kernel bug22:49
warthog9gahseyfan: what's the lure you've made btw?22:53
* warthog9 has been curious22:53
warthog9ranix: dunno22:53
warthog9ranix: haven't had time to dig into what's going on with that22:53
gahseyfan@warthog9: corporate project, we are hoping to share it22:53
warthog9is there a bug open on it?22:53
ranixk22:54
ka6soxI'm told I'll have the Cuttle(bone) Lure's back from Fab this weakend.22:55
gahseyfanwarthog9: are you asking if there is a bug open on ability to switch between SPI mode and GPIO mode for SS?  px2axx.c seems to want to put it into GPIO mode.  I can write up a summary of the "SPI questions" thread and put it in a bug if that is what you are askign22:56
warthog9gahseyfan: I was more referring to ranix's question on the CS inersion22:57
gahseyfanwarthog9: I may, of course, be using px2axx wrong though.  also aren't you on a transatlantic flight right now for brussels (the wonders of the Internet never cease)?22:57
gahseyfan@warthog9: it's the same issue22:57
warthog9ohhhh then yes, bug please22:57
gahseyfan@warthog9: the reason it's putting it in GPIO mode is because it wants to invert it22:58
gahseyfanerr trying to put it into gpio mode22:58
warthog9as I suspect there's several things going on and if nothing else I want something slightly more trackable than e-mail22:58
warthog9Ohhhhhh......22:58
gahseyfanwill do22:58
warthog9ewww22:58
warthog9hmmm22:58
gahseyfanyeah, it's a interesting bug22:58
gahseyfaner, if it's a bug22:58
warthog9open a bug and I'll go tack down internally who worked on that driver for baytrail22:59
gahseyfanit's an interesting issue22:59
warthog9see if we can get some answers22:59
gahseyfanwill do22:59
bcranhttp://store.netgate.com/MinnowBoardMax.aspx claims to have stock22:59
warthog9who the heck is that?22:59
warthog9hmmmm22:59
bcranno idea23:00
warthog9bcran: ok e-mail sent asking for clarification23:01
bcranlooks like they're also selling a case/enclosure for it - http://store.netgate.com/MBX/Case.aspx23:09
warthog9WHAT?23:15
warthog9That's COOL!23:15
warthog9bcran: thanks for the heads up :-)23:30
ranixthat is pretty cool23:35
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ranixno air vent though23:35
gahseyfan@warthog9: bug written up https://bugzilla.yoctoproject.org/show_bug.cgi?id=7267 looks like default assignment to Stephen Jolley.  thanks for taking a look into this23:36
yoctiBug 7267: normal, Undecided, ---, stephen.k.jolley, NEW , unable to switch SPI SS to active-high in a board file23:36
warthog9gahseyfan: :-)23:37
warthog9gahseyfan: doing what we can23:37
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