Friday, 2015-04-03

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mjkrhow do i get a second ethernet port onto minnowboard?07:27
mjkr(aside from ethernet over usb)07:27
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DonkeyHoteimjkr: the gig-e lure07:35
mjkrthank you. however, i wonder if i can get an intel server-class ethernet card to run for lure then?07:35
mjkr(i don't quite understand (3-1x or (1-1x and 1-2x)) on the page)07:35
mjkr(and actually there are two pages, and
DonkeyHoteithe atom on the board is not one of the server-class atoms btw07:37
mjkralso, is lure compatible with windows embedded server?07:38
mjkrwell, let me try to be specific then. -07:38
mjkrso, with lure(s), can i run intel's CNA XL710?07:39
mjkrwith windows embedded as host07:39
mjkrit's under the "converged" class07:40
mjkrnot the server class07:40
mjkrand maybe Gigabit CT Desktop Adapter from Intel as well?07:41
mjkrok. i read from the mailing list that minnowboard is supposed to only support one pcie lane07:58
mjkrso ONLY one nic07:59
mjkrhowever, does that mean if i have jetsam lure and minnowboard from circuitco, then i can ONLY use ONE of the two NICs?07:59
mjkrone ethernet port from minnowboard's own rj4507:59
mjkrthe other from the jetsam lure through a mini-pcie adapter08:00
mjkractually since minnowboard supports hdmi 1.4, does it include support for ethernet over hdmi cable?08:08
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RzRprpplague: warthog9: hi, whose bot is this ? :)10:04
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warthog9RzR: I'm not sure we know17:16
prpplagueiirc it was posted on g+17:16
* prpplague looks17:16
prpplagueRzR: not sure what his irc nick is17:18
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Aman_singhprpplague: are we going to use same arduino pins definitions as in galileo ?17:25
Aman_singhtotal 21 pins17:25
prpplagueAman_singh: not initially17:25
prpplagueAman_singh: we are going to use the exact definitions used with the calamari lure17:26
Aman_singhso intially pin 10 in not chip select instead of it pin 1 is chip select  , as we have on calamari ( direct mapping )17:28
Aman_singhsorry pin 517:29
Aman_singhof calamari17:29
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prpplagueAman_singh: just make it as close as possible, but don't expect for everything to match17:31
Aman_singhI went through wiring files they are using pin to description table mapping , stored in ardpin2descid []17:31
Aman_singhwe are not using it initially17:32
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Aman_singhIt means , need to write a lot , I was happy that everything is okay here no change needed17:34
Aman_singhokay , now can you brief about your plan17:34
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Aman_singhwho are we going map them and when , means after completing digital gpio or pwm17:37
Aman_singhin userspace mapping is like this >>  which shows it is flexible17:40
prpplagueAman_singh: there is no need to write a lot17:44
prpplagueAman_singh: i think maybe we are talking about different things17:44
Aman_singhmaybe  , I was talking about the mapping between arduino pins and  our pins ( calamari lure )17:46
prpplagueAman_singh: map the pins that map the same17:47
prpplagueAman_singh: anything that is missing, leave blank17:47
Aman_singhsee this17:47
Aman_singhcurrently , I have left normal ones but will fill them soon17:48
prpplagueAman_singh: got a meeting, i will look shortly17:48
prpplagueAman_singh: the biggest difference is we are not supporting any pinmuxing or resistor pullup/pulldown config with this revision17:52
prpplagueAman_singh: so as long as you can fit it into the existing structure without those...17:53
Aman_singhokay , but later we will use them so, I kept them and they are only here in table17:55
Aman_singhwhat you said about pullup/ pulldown , can you expain breifly ?17:56
prpplagueAman_singh: some microcontrollers and SoC's have software configuratable pull up/down resistors17:57
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Aman_singhokay , I will take care of it.18:00
tushrajHi @warthog9:  Are you there ?18:06
warthog9I am18:06
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warthog9tushraj: --^18:09
tushrajI've received your mail regarding GSoC and about the IRC meeting. I'm having internal tests in college from 6 april to 9 april and I'm out of station from 11 april.18:09
tushrajCan I get aapointment on 10th, I'll be totally free that whole day, If that possible.18:10
warthog9tushraj: maybe, send me all of your availability in e-mail18:10
tushraj@warthog9: Okay18:11
Aman_singhone more thing,  I was thinking of using handles from the beginning unlike userspace project , is it okay ?18:15
Aman_singhprpplague: I will like to start working on other files ...18:25
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Aman_singhprpplague: if we are not configuring pin type , what we will write in sys/class/gpio/gpio<*>/drive  ?19:44
prpplagueAman_singh: we won't be writing anything to start off with19:44
prpplagueAman_singh: we will assume everything is configured properly to work with the calamari19:45
Aman_singhgreat ! , less work =D19:45
Aman_singhconclusion : use pin no. on wiki page as id for handling and no worries about pin type .  If you find anything wrong , please tell and I am working on digital part first .  :)19:46
Aman_singh I am generating handles using them, okay ?19:49
prpplagueshould be fine19:49
Aman_singhlast and most  important , interview  when ?19:49
prpplaguenot sure yet19:50
prpplaguei am traveling on sunday to the portland intel offices19:50
prpplagueso i will need work on a schedule19:50
Aman_singhit's okay , I guess I am available all the time :)19:52
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dphI am trying to build Minnowboard MAX BIOS from EDK2 source, making some changes. But when I move the microcode firmware volume to make more space for FVMAIN, bad things happen. I believe this is occurring because the prebuilt binary PlatformCpuPolicy.efi is using PcdFlashMicroCodeAddress as a fixed at build PCD, so it no longer matches mine. Is there any way to move the microcode FV that I am missing?20:58
prpplaguedph: the best results for this type of question will be to ask on the minnowboard mailing list20:59
prpplaguedph: a number of the firmware "gurus" are on the list and respond to questions there20:59
dphis that the elinux mailing list?21:01
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