Thursday, 2016-01-21

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warthog9prpplague: cec isn't pulled through to the SOC I thought (it's a pin from that one level shifter I thought)09:02
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zentrumhmm is it possible for a future revision to connect the rts/cts pins of the serial too?21:03
prpplaguezentrum: for the debug uart?21:03
zentrumyes21:03
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prpplaguezentrum: there was a discussion on that early in the design cycle, and there was a specific reason why we didn't implement those on the debug uart, but i don't recal what it was21:04
prpplaguezentrum: what is the use case for that?21:04
prpplaguejelly: the detect pin for cec is connected to a gpio21:05
zentrumprpplague: I ported minix3 to the minnowboard and the existing serial protocol uses cts/rts21:05
prpplaguejelly: so you can use the gpio for the cec functions, just no real driver implemented for it21:05
zentrumin the meanwhile its fixed (I introduced a boot parameter to turn it off) but its a little bit annoying21:06
prpplagueahh21:06
zentrumand the high speed uart has RTS/CTS but unfortunately i do not have pci up and running in that early stage to use the device21:07
jellyprpplague: whoa, that's very good21:12
zentrumanother issue: the coreboot guys enable the debuag uart, but in tianocore the debug uart is disablet21:14
zentrumdisabled...21:14
zentrumI would expect its a no brainer for tianocore guys to make the debug uart available to the OS too?21:15
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