Tuesday, 2017-01-03

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* warthog9 waves at jimt's working setup03:33
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kanupatarhi guys10:29
kanupatarHow many video output can handled by minnow board?10:29
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kanupatarzentrum: Thanks. Do we have any dual display options with Minnow board?13:00
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Bitweasil... he left.  How do you get from "How many video outputs?" "One!" to "What about dual display options?"16:21
BitweasilI guess... maybe you could do something on an expansion bus with a custom set of drivers.16:21
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BitweasilI guess you could get a mPCIE video card and go that route.17:09
Bitweasilbut, really, at that point, you're probably better off going with a different board.17:09
warthog9Bitweasil: yeah17:46
warthog9there are options and possibilities17:46
zentrumBitweasil: http://new.ieiworld.com/en/product/model.php?II=72&event=3 <= this one is pretty nice with dual hdmi18:00
Bitweasil*nods* There's no real shortage of SoC industrial boards.  The Minnowboard is pretty well esoteric for standard use.19:33
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Bitweasilwarthog9, not sure if you saw, I got the HSUARTs working at 3M baud with CTS/RTS.21:00
BitweasilWhich, BY THE WAY, is disabled in the default config. :p21:01
warthog9Bitweasil: from the firmware?21:01
BitweasilFor the one that has the pins out.21:01
BitweasilFrom ring 0, yeah.21:01
warthog9ohhh nice21:01
warthog9hmmmm thought we had cts/rts working by default21:01
BitweasilI get having hardware flow control disabled on HSUART1.  It's not wired for it.  But for HSUART0, you bring the pins out but disable the flow control by default.21:01
BitweasilAt least not in 0.93 code.21:03
BitweasilStill disabled at head.21:04
warthog9Bitweasil: weird21:04
warthog9that's a change from when I wandered through the code a bygone era ago21:05
warthog9has it marked as enabled by default21:05
warthog9though now that you mention it I think I vaguely remember e-mails from like 2 years ago where that changed21:05
BitweasilI can understand why you might disable flow control, but it took me a while to figure out why things weren't working.21:09
BitweasilJust odd for a port that has the pins brought out.21:09
BitweasilKind of an an unusual port for most people to use.21:09
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Bitweasilwarthog9, how do I make GPIOs fire off an #SMI on state change?22:00
BitweasilI've got the reference sheet, but it's LONG. :p22:00
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warthog9Bitweasil: I'd be digging through the same document you've got, and I don't have it on this machine sadly22:04
BitweasilSure, make me do my own work... :p22:05
BitweasilOh, I filed a bug on the E3800 doc through the website, not sure if you happen to have an inside contact you can route the error to.22:05
Bitweasil27.2.2, y'all mathed wrong on the "Sclock Frequencies from M/N Settings" table.22:06
Bitweasil0x120 is 288, not 228.22:06
warthog9Bitweasil: lol, no I don't have any inside contact on that one22:17
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Bitweasilwarthog9, what is the difference between _CORE GPIO and _SUS GPIO?23:53
BitweasilAnd the S5 GPIOs route to the SUS (complex?  region?  whatever it's called?), correct?23:55

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